Search - vhdl pwm

[SCM] shukongzhiliudianyuan

Description: 介绍了一种闭环智能数控直流电流源的设计原理和实施方案，该方案采用自行设计制作的高精度电压源，利用单片机、PWM和运算放大器构成A/DD/A转换器来控制场效应管导通状态的原理，达到了输出恒流的目的。整个系统采用89C58单片机作为主控部件，将预置电流值数据送入D/A转换器，经硬件电路变换为恒定的直流输出，同时使用采样电阻将实际输出电流转换成电压送入A/D转换器，并将其反馈到单片机中构成闭环系统，进而实现预设值和实际值的比较，再通过调整D /A转换器输出的电压来改变场效应管的导通状态，减小了实际值与预设值之间的误差，实现了电流可预置、可步进调整、输出的电流信号可直接数字显示的功能。采用硬件闭环、软件闭环、软件实时积分、实时滤波的方法，锁定输出电流，从而实现了高精度恒流源的目的。此次所设计的电流源具有精度高、结构简单、工作稳定、操作方便、成本低廉、带负载能力强等优点-The scheme adapts high precision voltage source designed by ourselves Micro Control Unit (MCU) D/A converter and amplifier to control the transmitting state of field effect transistor which attains constant current. The system adapts MCU 89c52 as main control part the output current is transformed into the voltage by sample resistant and the voltage is sent to D/A converter and then sent to the MCU compared with the setting current. If there exist errors we should adapt D/A converter output and change the transmitting state of field effect transistor. The actual value is directed to the setting value. The direct current reaches the constant value. The closed loop control and PID arithmetic is used to realize high precision and wide range in the software design part. The intelligent current source realizes that the output current can be preset adjusted step by step and displayed in digit directly. Above functions are operated by keyboard within the current source. The stability of this
Platform: | Size: 2048 | Author: zhendongzhao | Hits:

[VHDL-FPGA-Verilog] pwm__vhdl

Description: 一个基于vhdl语言的脉冲宽度调制。并且有两个脉冲输出-Vhdl language-based pulse width modulation. And two pulse output
Platform: | Size: 904192 | Author: 邹细男 | Hits:

[VHDL-FPGA-Verilog] servo_module_worked

Description: verilog pwm to control servo motor on quartus
Platform: | Size: 21504 | Author: frankie | Hits:

[VHDL-FPGA-Verilog] VHDL100

Description: VHDL语言100例第1例带控制端口的加法器第2例无控制端口的加法器第3例乘法器第4例比较器第5例二路选择器第6例寄存器第7例移位寄存器第8例综合单元库第9例七值逻辑与基本数据类型第10例函数-VHDL
Platform: | Size: 307200 | Author: lsp | Hits:

[VHDL-FPGA-Verilog] Pulse_Width_Modulator_Altera_MAX_II_CPLD_Design_E

Description: Example VHDL project showing how to use a PWM by CPLD
Platform: | Size: 290816 | Author: maros | Hits:

[VHDL-FPGA-Verilog] URAT_VHDL

Description: FPGA采用模块工程文件QUARTUS II工程、ADC0809、电机控制PWM、LCD12864显示控制、UART_VHDL-FPGA module QUARTUS II project engineering documents, ADC0809, motor control PWM, LCD12864 display control, UART_VHDL
Platform: | Size: 238592 | Author: wangzhaohui | Hits:

[VHDL-FPGA-Verilog] ADC0809

Description: 完整ADC0809的时序，采用VHDL语言编写，在Altera cycloneI/II系列下的EP1C6\EP2C5\8平台下测试完成，稳定-ADC0809 Driver by VHDL
Platform: | Size: 406528 | Author: ziyan | Hits:

[VHDL-FPGA-Verilog] components

Description: quartus的几个IP核（PWM,RAM,I2C）-quartus several IP core (PWM, RAM, I2C)
Platform: | Size: 226304 | Author: 宋瑞 | Hits:

[VHDL-FPGA-Verilog] PWM

Description: PWM examples in VHDL
Platform: | Size: 31744 | Author: netox | Hits:

[VHDL-FPGA-Verilog] test4

Description: 用 vhdl 语言实现的 32个条目的 ARP-using vhdl language to realize ARP protocol with 32 entries
Platform: | Size: 1024 | Author: zhouli | Hits:

[Software Engineering] New_Stepper_Motor_Drive_Circuit

Description: 本课题设计了一款用于两相混合式步进电机的驱动芯片，内部集成了PWM(脉冲宽度调制)斩波控制和步进电机细分驱动功能，工作于36V并可持续输出1.5A 电流。PWM电流控制电路与3位非线性数模转换器相结合，可细分电机绕组上的电流，对步进电机进行整步、半步、1/4步或1/8步的细分控制，从而实现了步进电机不同步距角的运作。为了改善电机性能，特别是电机工作在微步距模式下的正弦电流波形下时，芯片可提供三种不同的电流衰减模式（快衰减模式、慢衰减模式、混合衰减模式）。同时，芯片内部的保护电路可实现过热关断和欠压锁定。-New Stepper Motor Drive Circuit
Platform: | Size: 1684480 | Author: 孙文 | Hits:

[VHDL-FPGA-Verilog] PWM_DA

Description: 随着电子技术的发展，出现了多种PWM技术，其中包括：相电压控制PWM、脉宽PWM法、随机PWM、SPWM法、线电压控制PWM等，而在镍氢电池智能充电器中采用的脉宽PWM法，它是把每一脉冲宽度均相等的脉冲列作为PWM波形，通过改变脉冲列的周期可以调频，改变脉冲的宽度或占空比可以调压，采用适当控制方法即可使电压与频率协调变化。可以通过调整PWM的周期、PWM的占空比而达到控制充电电流的目的。-With the development of electronic technology, a variety of PWM techniques, including: phase voltage control PWM, pulse width PWM method, random PWM, SPWM method, line voltage control PWM, etc., and in the nickel-metal hydride batteries used in smart charger pulse PWM method, which is equal to the width of each pulse of the pulse train as the PWM waveform, the cycle by changing the pulse train can be frequency, pulse width or duty cycle change can surge with appropriate voltage control method can make and changes in frequency coordination. Can adjust the PWM cycle, PWM duty cycle to achieve the purpose of controlling the charge current.
Platform: | Size: 196608 | Author: 王 | Hits:

[VHDL-FPGA-Verilog] vhdl

Description: 实验箱的蜂鸣器是交流蜂鸣器，在BZSP输入一定频率的脉冲时，蜂鸣器蜂鸣，改变输入频率可以改变蜂鸣器的响声。因此可以利用一个PWM来控制BZSP，通过改变PWM的频率来得到不同的声响，以此来播放音乐。-Experiment Box AC buzzer buzzer is in BZSP certain frequency pulse input, the buzzer beeps to change the input frequency can change the sound of the buzzer. So you can use a PWM to control BZSP, by changing the PWM frequency to get different sounds in order to play music.
Platform: | Size: 22528 | Author: 王记存 | Hits:

[Embeded-SCM Develop] DE0_PWM_LED

Description: 利用pwm做出的一个控制led亮度的小程序！-Pwm to make use of a control led brightness applet!
Platform: | Size: 15360 | Author: tony | Hits:

[VHDL-FPGA-Verilog] vhdl

Description: 用vhdl实现的抢答器程序。正弦波，锯齿波，三角波发生器程序。基于pwm技术的数码流水灯程序。计数器程序。-Responder with vhdl implementation process. Sine wave, sawtooth wave, triangle wave generator program. Pwm technology based on digital light process flow. Counter program.
Platform: | Size: 6144 | Author: 杨雨 | Hits:

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[SCM] shukongzhiliudianyuan

[VHDL-FPGA-Verilog] pwm__vhdl

[VHDL-FPGA-Verilog] servo_module_worked

[VHDL-FPGA-Verilog] VHDL100

[VHDL-FPGA-Verilog] Pulse_Width_Modulator_Altera_MAX_II_CPLD_Design_E

[VHDL-FPGA-Verilog] URAT_VHDL

[VHDL-FPGA-Verilog] ADC0809

[VHDL-FPGA-Verilog] components

[VHDL-FPGA-Verilog] PWM

[VHDL-FPGA-Verilog] test4

[Software Engineering] New_Stepper_Motor_Drive_Circuit

[VHDL-FPGA-Verilog] PWM_DA

[VHDL-FPGA-Verilog] vhdl

[Embeded-SCM Develop] DE0_PWM_LED

[VHDL-FPGA-Verilog] vhdl

[VHDL-FPGA-Verilog] PWM

[VHDL-FPGA-Verilog] pwm

[VHDL-FPGA-Verilog] samlecode.vhdl

[VHDL-FPGA-Verilog] Steppermotor

[VHDL-FPGA-Verilog] pwm

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